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Nasa picks Microchip to make spaceflight computing processor

Nasa has chosen Microchip Technology to create a cutting-edge computing platform to increase spaceflight efficiency and support future space missions

NASA's Jet Propulsion Laboratory has selected Microchip Technology Inc. to develop a high-performance spaceflight computing processor that will support future space missions. (NASA)

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NASA’s Jet Propulsion Laboratory (JPL), Southern California, has selected Microchip Technology Inc. of Chandler, Arizona, to develop a High-Performance Spaceflight Computing (HPSC)  processor that will have at least 100 times the computational power of present spacecraft computers. Future planetary exploration, lunar, and Mars surface missions would all benefit from this crucial capability.

“Microchip will architect, design, and deliver the HPSC processor over three years, with the goal of employing the processor on future lunar and planetary exploration missions,” according to a statement on the NASA JPL website. The scalable computing capability provided by Microchip's processor architecture will considerably increase the overall computing efficiency for these missions. The design will have larger fault tolerance and be more dependable. The processor will make it possible for spaceship computers to carry out calculations up to 100 times more quickly than they can now, the statement explains.

The most computationally demanding portion of a mission is addressed by current space-qualified computing technology, which results in overdesigning and inefficient use of computing resources. For example, aboard a spaceship, the same amount of energy and power is required for both small and large operations. However, the flexibility provided by Microchip's new processor design allows the processing capacity to fluctuate in response to operating needs at any given time. When not in use, some processing features can also be disabled. “This capability will save a large amount of energy and improve overall computing efficiency for space missions,” the statement adds.

Also read: Artemis 1: Nasa’s Moon-observing CubeSat set for launch

Niki Werkheiser, director of technology maturation within the Space Technology Mission Directorate at NASA Headquarters in Washington, says that this will be a "cutting-edge" technology that would benefit future space missions and even technologies on Earth. “This effort will amplify existing spacecraft capabilities and enable new ones and could ultimately be used by virtually every future space mission, all benefiting from more capable flight computing,” Werkheiser explains on the website. 

NASA's current spaceflight computers were developed over 30 years ago. “While they have served past missions well, future NASA missions demand significantly increased onboard computing capabilities and reliability,” said Wesley Powell, NASA’s principal technologist for advanced avionics. The new computing processor would provide advances “in performance, fault tolerance, and flexibility.” 

The computing services could also be useful for commercial services on Earth for, industrial automation, edge computing, time-sensitive Ethernet data transmission, artificial intelligence, and Internet of Things gateways as well.

The work will be carried out under a $50 million firm-fixed-price contract as part of NASA's ongoing commercial partnership initiatives, with Microchip providing considerable research and development resources to finish the project.

Also read: NASA might send swimming robots to the ‘ocean worlds' of outer space

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